A Unique Simulated Processing Unit, Presented Calculating Fibonacci.
Built from just wires, pegs and gates in Logic World.
This project is a custom-built 8-bit computational system designed entirely from first principles (literal wires and gates). It demonstrates how arithmetic, memory, control logic, and clocking interact to execute a program at the bit level.
The System currently executes a Fibonacci sequence using a modular hardwired instruction chain.
Every component — from logic gates to execution control — was designed and implemented manually, without any
external references or templates.
Version 1 (v1) is fully functional and stable.
Version 2 (v2) is under development and introduces a true instruction pipeline, indirect memory addressing,
branching, and advanced ALU functionality.
This was all implemented inside of Logic World, a sandbox game where you can build mechanical and digital systems using wires, gates, and other components.
I wanted to understand how computers actually work underneath abstraction layers. Not just how to write code for a processor, but how the processor itself executes instructions, stores state, moves data, and synchronises operations.
Building a CPU from individual logic components forces you to think differently. There is no compiler, framework, or operating system to hide mistakes. Every signal transition, memory operation, and timing issue has to be designed intentionally.
The project started as a small experiment with binary addition and quickly evolved into a complete sequential processor with memory, registers, control logic, and a functioning execution cycle.
"At some point, I realised I had accidentally started building an actual computer."
PROCESSOR_TYPE: Sequential Hardwired Computation
DATA_WIDTH: 8-bit
ADDRESS_WIDTH: 4-bit (16 bytes of memory)
BUS_ARCHITECTURE: Von Neumann (Single Shared instruction/data bus)
EXECUTION_MODE: Ripple-Controlled sequential execution
CLOCK_SYSTEM: Automatic with manual step override
ENVIRONMENT: Logic World
ADDRESSIBLE_RANGE: 16 Addresses
IMPLEMENTED_MEMORY(V1): 8 Bytes
MEMORY_TYPE: R/W RAM
ACCESS_METHOD: Direct Addressing
MDR: Operational
ACC: Operational
ALU: Operational - supports ADD
CU: Operational - hardwired sequential control logic
CLK: Operational, automatic with manual override
BUS: Operational
INPUT/OUTPUT: Output - Lightboard bit register visualisation
FLAGS: Overflow flag implemented
PIPELINE: NONE
BRANCHING: NONE
INDIRECT_ADDRESSING: NONE
PC: NONE
IR: NONE
INTERRUPTS: NONE
ALU · v1
The ALU was one of the first major subsystems implemented. It currently supports addition operations using chained carry logic across the full 8-bit width.
Early versions regularly failed due to incorrect carry propagation, which made debugging surprisingly difficult because a single incorrect bit could corrupt the entire result.
RAM · 8B
The RAM and registers were designed to provide fast access to frequently used data. They support direct addressing and are implemented as R/W RAM with a capacity of 8 bytes (12 addressable memory locations in v1, increasing to 1028 in v2). Specially designed registers such as ripples, W or R only memory locations, and output registers hooked up to LEDs were implemented.
All buses were bi-directional, so tracing an incorrect signal required checking every connected component for potential faults.
EXEC · FIB
The Fibonacci sequence was chosen as a demonstration program because it requires both arithmetic and memory operations, making it a good test of the system's capabilities. The program is implemented as a hardwired sequence of control signals that manipulate the ALU, registers, and memory to calculate Fibonacci numbers iteratively.
The initial program was actually designed using pen and paper, following messy hand drawn schematics and a myriad of unorganised carry bits to ensure that each step was correct.
This project massively improved my understanding of computer architecture and low-level system design. Concepts that normally feel abstract — such as registers, buses, clock cycles, instruction execution — began to actually feel intuitive and tangible after designing them from the ground up. This demistified a lot of the complex ideas and turned them into practical engineering problems.
It also changed how I think about software. Building even simple functionality at the hardware level gives a much better appreciation for abstraction, efficiency, and system constraints.
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